Silicon NPI Manager

Overview

An innovative player in the Semiconductor market is looking for an experienced NPI Leader to join their team at an exciting and key point of growth. You would have ownership of, plan and execute NPI of their custom ICs, including:

• Involvement from the early planning stages to ensure design-in of DFT and DFM, all the way through tape out, to a qualified product and initial production.
• Working closely with both internal design teams and external partners at a hands on technical level to plan and execute all NPI activities.
• Supporting technical details such as functional test patterns, DFT patterns, hardware schematics, GDS and IC layer stack.

Main Responsibilities

• Plan and monitor schedule and NRE budget for NPI activities
• Selection and management of external NPI partners and OSAT
• Support all technical interactions between internal design team and external NPI partners
• Ownership of DFT and DFM strategy
• Definition of ATE test strategy, including test H/W schematics and test plan
• Owning key product cost items such as test time, yield, package, DPS, etc
• Ownership of package and metal stack strategy
• Ownership of product and package qualification strategy and plan
• Ownership of final GDS and tape out, including dry-runs, IP merge and DRCs
• Defining and support prototype packaging for bench evaluation

Skills, Qualifications and Experience

• Proven track record of taking multiple products from design to mass production
• Knowledge of both digital and analogue test methods
• Degree in electronic engineering or equivalent
• In-depth knowledge of Integrated Circuit production flow and supply chain
• In-depth knowledge of key NPI activities such as probe technologies, ATE hardware and workflows, and packaging options
• Knowledge of JEDEC standards and techniques for Stress-Test-Driven Qualification of ICs
• Experience of DFT flows (MBIST, scan), including supporting bring up on an ATE
• Familiarisation of FAB, including navigating online portal, tape out process, foundry service requests, corner lots plans
• Experience of key industrialisation processes, such as PVT char, yield improvement, limit setting, trial lot run, and gauge R&R
• Excellent data analysis skills and experience of working with ATE data formats such as STDF
• Knowledge of silicon and package Failure Analysis techniques, including de-bug techniques such as FIB

Personal Skills

• Self-motivated team player with excellent technical communication skills
• Ability to communicate and work effectively with both internal and external teams
• Diligent with strong attention to detail
• A finisher, driven by targets and milestones, and keen to work in a small and dynamic team

If you would like to learn more of an insight into this role please reach out to to arrange a call.