Senior Principal Analog IP Architect - Power & Clock

onsemi is seeking a Sr Principal Analog Design Engineer to lead analog IP design for the Treo platform in Cork, coordinating power, clock, and safety-related blocks within a digital-on-top SoC integration flow.

You will mentor engineers, own IP from concept to tape-out, ensure automotive-grade quality per ISO 26262, and collaborate with digital, verification, and layout teams to deliver robust, production-ready silicon.