Senior ASIC Verification Architect - HBM/PCIe

Synopsys, Inc. is looking for an ASIC Digital Verification Architect in Reading, UK. This role focuses on ASIC design and verification, particularly with HBM and PCIe/CXL protocols. You will work on developing verification plans and collaborating cross-functionally while mentoring junior engineers.

The ideal candidate should have extensive experience in ASIC RTL design, strong problem-solving abilities, and excellent communication skills. Join our innovative team to influence cutting-edge semiconductor solutions and technologies.