RTL Design Engineer (FPGA/ASIC)

We are collaborating with an innovative technology company at the forefront of semiconductor solutions, focusing on building next-generation digital systems. This dynamic team is passionate about delivering high-performance hardware products that shape the future of computing.

Position Overview

Our client is seeking a talented RTL Design Engineer with a strong background in FPGA and/or ASIC development to join their rapidly expanding team. In this role, you will play a key part in designing and implementing cutting-edge digital systems, working alongside multidisciplinary teams to create high-performance hardware solutions.

Key Responsibilities

• Develop RTL designs for FPGA and ASIC implementations using Verilog (or VHDL).
• Translate system-level requirements into efficient, scalable digital architectures.
• Optimize designs for timing, power, and area, leveraging synthesis and place-and-route tools such as Xilinx Vivado.
• Perform detailed post-synthesis and post-route analyses to ensure design closure and performance compliance.
• Apply industry best practices in RTL design, including modular design, pipelining, and code reuse.
• Collaborate closely with hardware, software, and system engineering teams to define and integrate FPGA/ASIC requirements.
• Maintain clear, thorough documentation for RTL designs, specifications, and user guides.
• Track project progress, report on milestones, and proactively identify potential risks or issues.
• Stay current with the latest trends, tools, and technologies in FPGA/ASIC development, evaluating new solutions to enhance ongoing and future projects.
• Experience with UVM is an added advantage.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree preferred).
• At least 5 years of hands-on experience in RTL design and coding.
• Proficiency in Verilog and a solid understanding of digital design fundamentals.
• Proven experience in FPGA and ASIC development workflows.
• Familiarity with FPGA platforms such as Xilinx or Intel/Altera.
• Strong knowledge of digital logic design, finite state machines, and SoC architectures.
• Experience with synthesis, timing closure, and managing physical design constraints.
• Background in developing high-performance or real-time FPGA-based systems.
• SoC design experience is a strong plus.

How to Apply

If you are a motivated RTL Design Engineer eager to work on challenging projects in a fast-paced environment, we invite you to apply now or email your CV to .

Join a team that values innovation, collaboration, and the pursuit of excellence.

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