Lead Analog Layout Engineer - High-Speed Chip Links

Kandou AI in Reading is seeking an Analog Layout Engineer (Lead) to drive custom analog layout, verification, and IP integration for high-speed communication links across advanced nodes. You will collaborate with design teams and customers to implement robust, energy-efficient layouts.

The role requires expertise in HF/RF analog blocks, layout techniques for high-speed circuits, and experience with Cadence Virtuoso, Spectre/HSpice, and Calibre.