EMIR & Power Integrity Engineer for SoC Signoff

Deel is seeking an EMIR / Power Integrity Engineer to join our SoC physical design team. You will lead PDN planning, IR drop analysis, EMIR verification, and signoff for advanced semiconductor designs to ensure reliable power delivery across the chip.

You will collaborate with PD, CAD, RTL, Package, and Reliability teams, automate flows with Tcl/Python, and support advanced nodes while driving ECO-based improvements toward signoff-quality designs.