DV Engineer/Lead

Role - DV Engineer
Location:EU / Remote

Mandatory Skill:

• IP/ SOC verification
• Verilog, System Verilog, UVM
• Code Coverage, functional coverage

Industry Experience : 5 to 10 years

1. SOC Verfication Experience on ARM Ecosystem
2. PCIE Experience and also PCIE-VIP usage experience
3. GLS working experience
4. Proficient in C/System Verilog and UVM
5. Working knowledge of GIT

Soft skill - Good Communication and willingness to click apply for full job details