SoC Verification Engineer

SoC Verification Engineer

Fortaegis is a fast-scaling, highly ambitious and cutting-edge semiconductor company. We are looking for an experienced SoC Verification Engineer to join the hardware engineering team. As a Verification Engineer, you will play a key role in ensuring the quality and reliability of our cutting-edge products. Leveraging your extensive experience with Universal Verification Methodology (UVM) and verification techniques, you will contribute to the development of robust verification environments and methodologies. You will collaborate closely with cross-functional teams including design, architecture and software engineering to deliver high-quality solutions that meet or exceed customer expectations. We are looking for candidates with not only an exceptional skillset, but also an exceptional mindset, willing to go above and beyond to make our breakthrough product even better.

Responsibilities:

• Develop comprehensive verification plans and test cases based on design specifications and SoC use cases.
• Design, implement, and maintain scalable and reusable UVM-based testbenches for complex digital SoC designs.
• Execute test cases and verify functionality, performance, and compliance with specifications; drive functional and code coverage to meet quality targets
• Debug design and verification issues and work closely with design engineers to ensure timely resolution.
• Continuously improve verification methodologies, processes, and best practices to enhance efficiency and effectiveness.
• Collaborate with other teams to align verification efforts with project milestones and goals.
• Participate in design and architecture reviews, providing input from a verification standpoint to influence key decisions.

Requirements:

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field; a Master's degree is a plus.
• Minimum of 10 years of experience in digital verification.
• Strong understanding of digital RTL design and verification principles.
• Proven experience with development and deployment of large-scale SoCs on emulation platforms.
• Hands-on experience of verifying processor-based system designs
• Experience with verification of high-speed IO and subsystems such as PCIe, DDR, UCIe, and Ethernet.
• Proficiency in hardware verification languages (e.g. SystemVerilog, SystemC), and scripting languages (e.g. Makefile, Tcl, Perl, Python)
• Familiarity with C/C++ for test and infrastructure development
• Deep knowledge of verification methodologies such as SystemVerilog, UVM, and SVA; experience with formal verification and emulation is a plus.
• Comprehensive exposure to all phases of verification lifecycle, including requirements collection,verification planning, test plans, testbench architecture, test case development, and documentation.
• Experience with HW/SW Co-simulation/emulation, including QEMU is desirable but not required.

The successful candidate will have the unique opportunity to participate in shaping the verification infrastructure and processes from the ground up, contributing to the development

of ultra-secure and high-performance SoC designs. They will be part of a highly motivated, dynamic and innovative team, working in a collaborative and challenging environment at the

forefront of semiconductor technology.