Senior ASIC/SoC Verification Lead

HCL Technologies Limited is seeking a Senior Design Lead with 5-7 years of ASIC/SoC verification experience. The role focuses on UVM-based testbench development, C-based TB for SOC, and advanced verification techniques including functional coverage and assertions.

Strong scripting skills are beneficial for automation. Candidate should have expertise in Verilog/SystemVerilog, UVM/OVM methodologies, and experience with IC design verification from tape-out to closure.