Senior ASIC Verification Engineer - UVM, SoC & RTL

A leading ASIC design company in the United Kingdom is seeking a highly skilled ASIC Digital Verification Engineer. The role involves developing verification strategies and advanced test environments to ensure success for complex digital and mixed-signal SoCs. Candidates should have 5-10 years of verification experience, strong expertise in SystemVerilog, and the ability to collaborate across global design teams. This role offers an exciting opportunity to solve challenging problems in a dynamic environment.