Senior Analog ASIC Lead Engineer

Renesas in the United Kingdom is seeking a senior analog IC design engineer to lead CMOS block design for custom ASICs in a fast-paced environment. You will verify blocks like amplifiers, oscillators, LDOs, and reference circuits, while guiding layout and collaborating with DFT and test teams.

The role requires 5-8 years' hands-on analog experience, Cadence/EDA proficiency and strong English communication. Occasional international travel and mentoring responsibilities are included.