Lead Analog Layout Engineer for 64 Gbps SERDES (UCie)

Posted 21 days 1 hour ago by Cadence Design Systems

Permanent

Full Time

Other

Cork, Ireland

Job Description

Cadence Ireland in Cork is seeking a Lead Analog Layout Design Engineer to take a technical leadership role on the PMA custom layout design team within the SERDES Product Team.

You will design high speed SERDES up to 64 Gbps on cutting-edge nodes, collaborate with circuit designers worldwide, and guide the back-end flow from floorplanning to final sign-off.

The role requires 7+ years in CMOS SERDES layout and a strong track record delivering IP and test chips, with a degree in engineering.